SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 69

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(3) Mode transitions from SLOW to STOP to SLOW
(4) Mode transitions from SLOW to SLEEP to SLOW
fsys
(Low-speed clock)
Mode
CG
(Low-speed clock)
Warm-up (W-up)
fsys
(Low-speed clock)
Mode
CG
(Low-speed clock)
Warm-up (W-up)
Note 1:
Note 2:
up signaling, it must be held active for at least 500 s for the internal system to stabilize.
Although the fs clock continues oscillation, a warm-up time must be specified.
For the TMP1940FDBF with an on-chip flash, when the RESET signal is used for STOP/ SLEEP wake-
When fosc = 32.768 kHz
When fosc = 32.768 kHz
SYSCR2.WUPT[1:0]
SYSCR2.WUPT[1:0]
W-up Time Select
W-up Time Select
SLOW
10 (2
11 (2
SLOW
10 (2
01 (2
11 (2
01 (2
16
14
16
14
8
8
/fosc)
/fosc)
/fosc)
/fosc)
/fosc)
/fosc)
TMP1940CYAF-27
W-up Time (fc)
W-up Time (fc)
2000 ms
500 ms
7.8 ms
2000 ms
500 ms
7.8 ms
System clock stopped
continues oscillation.
Low-speed clock
oscillator started
Warm-up started
Low-speed clock
Warm-up started
SLEEP
STOP
Warm-up completed
Warm-up completed
TMP1940CYAF
SLOW
SLOW

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