SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 27

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3.8
3.3.9
The failure rate of semiconductor devices is greatly increased as operating temperatures
increase. As shown in Figure 2, the internal thermal stress on a device is the sum of the ambient
temperature and the temperature rise due to power dissipation in the device. Therefore, to
achieve optimum reliability, observe the following precautions concerning thermal design:
(1) Keep the ambient temperature (Ta) as low as possible.
(2) If the device’s dynamic power dissipation is relatively large, select the most appropriate
(3) Derate the device’s absolute maximum ratings to minimize thermal stress from power
When connecting inputs and outputs between devices, make sure input voltage (V
output voltage (V
connecting devices operating at different supply voltages, such as in a dual-power-supply system,
be aware that erroneous power-on and power-off sequences can result in device breakdown. For
details of how to interface particular devices, consult the relevant technical datasheets and
databooks. If you have any questions or doubts about interfacing, contact your nearest Toshiba
office or distributor.
Thermal design
circuit board material, and consider the use of heat sinks or of forced air cooling. Such
measures will help lower the thermal resistance of the package.
dissipation.
in which ja = thermal resistance between junction and surrounding air (°C/W)
Interfacing
ja = jc + ca
ja = (Tj–Ta) / P
jc = (Tj–Tc) / P
ca = (Tc–Ta) / P
Tj = junction temperature or chip temperature (°C)
Tc = package surface temperature or case temperature (°C)
Ta = ambient temperature (°C)
P = power dissipation (W)
jc = thermal resistance between junction and package surface, or internal thermal
ca = thermal resistance between package surface and surrounding air, or external
OL
resistance (°C/W)
thermal resistance (°C/W)
/V
OH
) levels are matched. Otherwise, the devices may malfunction. When
Figure 2 Thermal resistance of package
3 General Safety Precautions and Usage Considerations
ca
jc
13
Ta
Tc
Tj
IL
/V
IH
) and