AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 105
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
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19. Embedded Flash Controller (EFC)
19.1
19.2
19.2.1
Table 19-1.
SAM7S512
32
2
Overview
The Embedded Flash Controller (EFC ) is a part of the Memory Controller and ensures the interface of the Flash
block with the 32-bit internal bus. It increases performance in Thumb Mode for Code Fetch with its system of 32-bit
buffers. It also manages the programming, erasing, locking and unlocking sequences using a full set of commands.
The SAM7S512 is equipped with two EFCs, EFC0 and EFC1. EFC1 does not feature the Security bit and GPNVM
bit. The Security and GPNVM bits embedded only on EFC0 apply to the two blocks in the SAM7S512.
Functional Description
The Embedded Flash interfaces directly to the 32-bit internal bus. It is composed of several interfaces:
The Embedded Flash size, the page size and the lock region organization are described in the product definition
section.
• One memory plane organized in several pages of the same size
• Two 32-bit read buffers used for code read optimization (see
• One write buffer that manages page programming. The write buffer size is equal to the page size. This buffer is
• Several lock bits used to protect write and erase operations on lock regions. A lock region is composed of
• Several general-purpose NVM bits. Each bit controls a specific feature in the device. Refer to the product
Embedded Flash Organization
write-only and accessible all along the 1 MByte address space, so that each word can be written to its final
address (see
several consecutive pages, and each lock region has its associated lock bit.
definition section to get the GPNVM assignment.
SAM7S256
Product Specific Lock and General-purpose NVM Bits
16
2
“Write Operations” on page
SAM7S128
2
8
SAM7S64
16
2
SAM7S321
109).
2
8
SAM7S32
2
8
“Read Operations” on page
SAM7S161
2
8
SAM7S Series [DATASHEET]
SAM7S16
2
8
6175M–ATARM–26-Oct-12
107).
Number of GPNVM bits
Number of Lock Bits
Denomination
105
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