AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 99

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

18.3.2.2
18.3.3
18.3.4
If an access is done in the address area 0x0030 000 to 0x003F FFFF, no abort is generated.
Figure 18-3. Internal Memory Mapping
The first 32 bytes of Internal Memory Area 0 contain the ARM processor exception vectors, in particular, the Reset
Vector at address 0x0.
Before execution of the remap command, the on-chip Flash is mapped into Internal Memory Area 0, so that the
ARM7TDMI reaches an executable instruction contained in Flash. After the remap command, the internal SRAM at
address 0x0020 0000 is mapped into Internal Memory Area 0. The memory mapped into Internal Memory Area 0 is
accessible in both its original location and at address 0x0.
After execution, the Remap Command causes the Internal SRAM to be accessed through the Internal Memory
Area 0.
As the ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, and Fast Interrupt)
are mapped from address 0x0 to address 0x20, the Remap Command allows the user to redefine dynamically
these vectors under software control.
The Remap Command is accessible through the Memory Controller User Interface by writing the MC_RCR
(Remap Control Register) RCB field to one.
The Remap Command can be cancelled by writing the MC_RCR RCB field to one, which acts as a toggling com-
mand. This allows easy debug of the user-defined boot sequence by offering a simple way to put the chip in the
same configuration as after a reset.
There are three reasons for an abort to occur:
When an abort occurs, a signal is sent back to all the masters, regardless of which one has generated the access.
However, only the ARM7TDMI can take an abort signal into account, and only under the condition that it was gen-
erating an access. The Peripheral DMA Controller does not handle the abort input signal. Note that the connection
is not represented in
• access to an undefined address
• an access to a misaligned address.
Remap Command
Abort Status
Internal Memory Area 0
256M Bytes
Figure
18-1.
0x0000 0000
0x0010 0000
0x0020 0000
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
0x0030 0000
Internal Memory Area 0
Internal Memory Area 1
Internal Memory Area 2
Undefined Areas
Internal SRAM
Internal Flash
(Abort)
SAM7S Series [DATASHEET]
1M Bytes
1M Bytes
1M Bytes
253M bytes
6175M–ATARM–26-Oct-12
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