AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 23

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AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

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8.8.3
8.8.3.1 SAM7S512
8.8.3.2 SAM7S256
8.8.3.3 SAM7S128
8.8.3.4 SAM7S64
8.8.3.5 SAM7S321/32
Lock Regions
Two Embedded Flash Controllers each manage 16 lock bits to protect 16 regions of the flash against inadvertent flash
erasing or programming commands. The SAM7S512 contains 32 lock regions and each lock region contains 64 pages of
256 bytes. Each lock region has a size of 16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the LOCKE bit in the MC_FSR
register rises and the interrupt line rises if the LOCKE bit has been written at 1 in the MC_FMR register.
The 16 NVM bits (or 32 NVM bits) are software programmable through the corresponding EFC User Interface. The
command “Set Lock Bit” enables the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The Embedded Flash Controller manages 16 lock bits to protect 16 regions of the flash against inadvertent flash erasing
or programming commands. The SAM7S256 contains 16 lock regions and each lock region contains 64 pages of 256
bytes. Each lock region has a size of 16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the LOCKE bit in the MC_FSR
register rises and the interrupt line rises if the LOCKE bit has been written at 1 in the MC_FMR register.
The 16 NVM bits are software programmable through the EFC User Interface. The command “Set Lock Bit” enables the
protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The Embedded Flash Controller manages 8 lock bits to protect 8 regions of the flash against inadvertent flash erasing or
programming commands. The SAM7S128 contains 8 lock regions and each lock region contains 64 pages of 256 bytes.
Each lock region has a size of 16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the LOCKE bit in the MC_FSR
register rises and the interrupt line rises if the LOCKE bit has been written at 1 in the MC_FMR register.
The 8 NVM bits are software programmable through the EFC User Interface. The command “Set Lock Bit” enables the
protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The Embedded Flash Controller manages 16 lock bits to protect 16 regions of the flash against inadvertent flash erasing
or programming commands. The SAM7S64 contains 16 lock regions and each lock region contains 32 pages of 128
bytes. Each lock region has a size of 4 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the LOCKE bit in the MC_FSR
register rises and the interrupt line rises if the LOCKE bit has been written at 1 in the MC_FMR register.
The 16 NVM bits are software programmable through the EFC User Interface. The command “Set Lock Bit” enables the
protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The Embedded Flash Controller manages 8 lock bits to protect 8 regions of the flash against inadvertent flash erasing or
programming commands. The SAM7S321/32 contains 8 lock regions and each lock region contains 32 pages of 128
bytes. Each lock region has a size of 4 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the LOCKE bit in the MC_FSR
register rises and the interrupt line rises if the LOCKE bit has been written at 1 in the MC_FMR register.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
23

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