AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 617

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

40.6.5
40.6.5.1
40.6.5.2
40.6.5.3
40.6.6
40.6.6.1
40.6.6.2
When PA17, PA18, PA19 or PA20 (the I/O lines multiplexed with the analog inputs) are set as digital inputs with
pull-up disabled, the leakage can be 9 µA in worst case and 90 nA in typical case per I/O when the I/O is set exter-
nally at low level.
Set the I/O to VDDIO by internal or external pull-up.
When NRST or PA0-PA16 or PA21-PA31 are set as digital inputs with pull-up enabled, the voltage of the I/O stabi-
lizes at VPull-up.
Vpull-up
This condition causes a leakage through VDDIO. This leakage is 45 µA per pad in worst case at 3.3 V and 25 µA at
1.8V.
I Leakage
It is recommended to use an external pull-up if needed.
When NRST or PA0-PA16 and or PA21-PA31 are set as digital inputs with pull-up enabled, driving the I/O with an
output impedance higher than 500 ohms may not drive the I/O to a logical zero.
Output impedance must be lower than 500 ohms.
Under certain rare circumstances, when CSS = 00 in PMC_MCKR, and PA1 is set as an input and a transition
occurs on PA1, device malfunction might occur.
Do not transition PA1 as an input when CSS = 00 in PMC_MCKR.
Under certain rare circumstances, reprogramming the CSS value in the PMC_MCKR register (i.e switching the
main clock source) might generate malfunction of the device if the following two actions occur simultaneously.
VPull-up Min
VDDIO - 0.65 V
Parameter
I Leakage at 3,3V
I Leakage at 1.8V
1. Switching from:
Parallel Input/Output Controller (PIO)
Power Management Controller (PMC)
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
PIO: Leakage on PA17 - PA20
PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1
PMC: Programming CSS in PMC_MCKR Register
– PLL Clock to Slow Clock or
VPull-up Max
VDDIO - 0.45 V
Typ
2.5
1
µA
µA
Max
45
25
µA
µA
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
617