AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 513

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

Figure 35-11. Data OUT Transfer for Ping-pong Endpoint
Note:
35.5.2.8
USB Bus
Packets
RX_DATA_BK0 Flag
(UDP_CSRx)
RX_DATA_BK1 Flag
(UDP_CSRx)
FIFO (DPR)
Bank 0
FIFO (DPR)
Bank 1
An interrupt is pending while the RX_DATA_BK0 or RX_DATA_BK1 flag is set.
Warning: When RX_DATA_BK0 and RX_DATA_BK1 are both set, there is no way to determine which one to clear
first. Thus the software must keep an internal counter to be sure to clear alternatively RX_DATA_BK0 then
RX_DATA_BK1. This situation may occur when the software application is busy elsewhere and the two banks are
filled by the USB host. Once the application comes back to the USB driver, the two flags are set.
A stall handshake can be used in one of two distinct occasions. (For more information on the stall handshake, refer
to Chapter 8 of the Universal Serial Bus Specification, Rev 2.0.)
The following procedure generates a stall packet:
When a setup transaction is received after a stall handshake, STALLSENT must be cleared in order to prevent
interrupts due to STALLSENT being set.
• A functional stall is used when the halt feature associated with the endpoint is set. (Refer to Chapter 9 of the
• To abort the current request, a protocol stall is used, but uniquely with control transfer.
1. The microcontroller sets the FORCESTALL flag in the UDP_ CSRx endpoint’s register.
2. The host receives the stall packet.
3. The microcontroller is notified that the device has sent the stall by polling the STALLSENT to be set. An
Universal Serial Bus Specification, Rev 2.0, for more information on the halt feature.)
Stall Handshake
endpoint interrupt is pending while STALLSENT is set. The microcontroller must clear STALLSENT to
clear the interrupt.
Host Sends First Data Payload
Data OUT
PID
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 0
Write by USB Device
Data OUT1
Data OUT 1
ACK
PID
Read By Microcontroller
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 1
Interrupt Pending
Microcontroller Reads Data 1 in Bank 0,
Host Sends Second Data Payload
Data OUT 1
Data OUT
PID
Write by USB Device
Data OUT 2
Data OUT 2
Cleared by Firmware
ACK
PID
SAM7S Series [DATASHEET]
Read By Microcontroller
Microcontroller Reads Data2 in Bank 1,
Host Sends Third Data Payload
Data OUT
PID
Interrupt Pending
Data OUT 2
6175M–ATARM–26-Oct-12
Write In Progress
Cleared by Firmware
Data OUT 3
Data OUT 3
A
P
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