AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 541

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

36.5
36.5.1
36.5.2
36.5.3
Functional Description
The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 10-bit digital data
requires Sample and Hold Clock cycles as defined in the field SHTIM of the
10 ADC Clock cycles. The ADC Clock frequency is selected in the PRESCAL field of the Mode Register
(ADC_MR).
The ADC clock range is between MCK/2, if PRESCAL is 0, and MCK/128, if PRESCAL is set to 63 (0x3F). PRES-
CAL must be programmed in order to provide an ADC clock frequency according to the parameters given in the
Product definition section.
The conversion is performed on a full range between 0V and the reference voltage pin ADVREF. Analog inputs
between these voltages convert to values based on a linear conversion.
The ADC supports 8-bit or 10-bit resolutions. The 8-bit selection is performed by setting the bit LOWRES in the
ADC Mode Register (ADC_MR). By default, after a reset, the resolution is the highest and the DATA field in the
data registers is fully used. By setting the bit LOWRES, the ADC switches in the lowest resolution and the conver-
sion results can be read in the eight lowest significant bits of the data registers. The two highest bits of the DATA
field in the corresponding ADC_CDR register and of the LDATA field in the ADC_LCDR register read 0.
Moreover, when a PDC channel is connected to the ADC, 10-bit resolution sets the transfer request sizes to 16-bit.
Setting the bit LOWRES automatically switches to 8-bit data transfers. In this case, the destination buffers are
optimized.
Analog-to-digital Conversion
Conversion Reference
Conversion Resolution
“ADC Mode Register” on page 548
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
and
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