AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 113

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

19.2.4.5
Two errors can be detected in the MC_FSR register after a programming sequence:
It is possible to deactivate a general-purpose NVM bit set previously. The clear sequence is:
Two errors can be detected in the MC_FSR register after a programming sequence:
The Clear General-purpose Bit command programs the general-purpose NVM bit to 0; the corresponding bit
GPNVM0 to GPNVMx in MC_FSR reads 0. The Set General-purpose Bit command programs the general-purpose
NVM bit to 1; the corresponding bit GPNVMx in MC_FSR reads 1.
Note:
The goal of the security bit is to prevent external access to the internal bus system. (Does not apply to EFC1 on
theSAM7S512.) JTAG, Fast Flash Programming and Flash Serial Test Interface features are disabled. Once set,
this bit can be reset only by an external hardware ERASE request to the chip. Refer to the product definition sec-
tion for the pin name that controls the ERASE. In this case, the full memory plane is erased and all lock and
general-purpose NVM bits are cleared. The security bit in the MC_FSR is cleared only after these operations. The
activation sequence is:
When the security bit is active, the SECURITY bit in the MC_FSR is set.
• When the bit is set, the bit FRDY in the Flash Programming Status Register (MC_FSR) rises. If an interrupt has
• Programming Error: A bad keyword and/or an invalid command have been written in the MC_FCR register
• If the general-purpose bit number is greater than the total number of general-purpose bits, then the command
• Start the Clear General-purpose Bit command (CGPB) by writing the Flash Command Register with CGPB and
• When the clear completes, the bit FRDY in the Flash Programming Status Register (MC_FSR) rises. If an
• Programming Error: a bad keyword and/or an invalid command have been written in the MC_FCR register
• If the number of the general-purpose bit set in the PAGEN field is greater than the total number of general-
• Start the Set Security Bit command (SSB) by writing the Flash Command Register.
• When the locking completes, the bit FRDY in the Flash Programming Status Register (MC_FSR) rises. If an
been enabled by setting the bit FRDY in MC_FMR, the interrupt line of the Memory Controller is activated.
has no effect.
the number of the general-purpose bit to be cleared in the PAGEN field.
interrupt has been enabled by setting the bit FRDY in MC_FMR, the interrupt line of the Memory Controller is
activated.
purpose bits, then the command has no effect.
interrupt has been enabled by setting the bit FRDY in MC_FMR, the interrupt line of the Memory Controller is
activated.
Security Bit
Access to the Flash in read mode is permitted when a Set, Clear or Get General-purpose NVM Bit command is
performed.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
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