AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 141

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

20.3.4.6
20.3.4.7
Security bits can be set using Set Security Bit command (SSE). Once the security bit is active, the Fast Flash pro-
gramming is disabled. No other command can be run. Only an event on the Erase pin can erase the security bit
once the contents of the Flash have been erased.
The SAM7S512 security bit is controlled by the EFC0. To use the Set Security Bit command, the EFC0 must be
selected using the Select EFC command.
Table 20-29. Set Security Bit Command
Once the security bit is set, it is not possible to access FFPI. The only way to erase the security bit is to erase the
Flash.
In order to erase the Flash, the user must perform the following:
Then it is possible to return to FFPI mode and check that Flash is erased.
The commands WPx, EA, xLB, xFB are executed using the current EFC controller. The default EFC controller is
EFC0. The Select EFC command (SEFC) allows selection of the current EFC controller.
Table 20-30. Select EFC Command
Read/Write
Write
Step
1
2
• Power-off the chip
• Power-on the chip with TST = 0
• Assert Erase during a period of more than 220 ms
• Power-off the chip
Flash Security Bit Command
SAM7S512 Select EFC Command
Handshake Sequence
Write handshaking
Write handshaking
DR Data
SSE
MODE[3:0]
CMDE
DATA
DATA[15:0]
SEFC
0 = Select EFC0
1 = Select EFC1
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
141