AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 539

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AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

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36. Analog-to-Digital Converter (ADC)
36.1
36.2
Figure 36-1. Analog-to-Digital Converter Block Diagram
Overview
The ADC is based on a Successive Approximation Register (SAR) 10-bit Analog-to-Digital Converter (ADC). It also
integrates an 8-to-1 analog multiplexer, making possible the analog-to-digital conversions of 8 analog lines. The
conversions extend from 0V to ADVREF.
The ADC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in a common register for
all channels, as well as in a channel-dedicated register. Software trigger, external trigger on rising edge of the
ADTRG pin or internal triggers from Timer Counter output(s) are configurable.
The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC channel. These fea-
tures reduce both power consumption and processor intervention.
Finally, the user can configure ADC timings, such as Startup Time and Sample & Hold Time.
Block Diagram
Analog Inputs
with I/O lines
Multiplexed
Dedicated
Analog
Inputs
ADVREF
ADTRG
VDDIN
AD-
AD-
AD-
AD-
AD-
AD-
GND
PIO
Selection
Channels
Trigger
Counter
Timer
Analog-to-Digital
Approximation
ADC cell
Successive
Converter
Register
ADC Controller
Interface
Control
PMC
Logic
User
MCK
SAM7S Series [DATASHEET]
ADC Interrupt
PDC
6175M–ATARM–26-Oct-12
AIC
Peripheral Bridge
ASB
APB
539

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