AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 488

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

Figure 34-6. Synchronized Period or Duty Cycle Update
To prevent overwriting the PWM_CUPDx by software, the user can use status events in order to synchronize his
software. Two methods are possible. In both, the user must enable the dedicated interrupt in PWM_IER at PWM
Controller level.
The first method (polling method) consists of reading the relevant status bit in PWM_ISR Register according to the
enabled channel(s). See
The second method uses an Interrupt Service Routine associated with the PWM channel.
Note:
Figure 34-7. Polling Method
Note:
Reading the PWM_ISR register automatically clears CHIDx flags.
Polarity and alignment can be modified only when the channel is disabled.
End of Cycle
Figure
34-7.
Acknowledgement and clear previous register state
PWM_CPRDx
The last write has been taken into account
Update of the Period or Duty Cycle
Writing in PWM_CUPDx
PWM_CUPDx Value
Writing in CPD field
PWM_ISR Read
1
User's Writing
CHIDx = 1
YES
PWM_CDTYx
0
PWM_CMRx. CPD
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
488