AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 166

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AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

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23.7.2
23.7.2.1
23.7.2.2
Global interrupt latencies depend on several parameters, including:
This section addresses only the hardware resynchronizations. It gives details of the latency times between the
event on an external interrupt leading in a valid interrupt (edge or level) or the assertion of an internal interrupt
source and the assertion of the nIRQ or nFIQ line on the processor. The resynchronization time depends on the
programming of the interrupt source and on its type (internal or external). For the standard interrupt, resynchroniza-
tion times are given assuming there is no higher priority in progress.
The PIO Controller multiplexing has no effect on the interrupt latencies of the external interrupt sources.
Figure 23-6.
Figure 23-7.
• The time the software masks the interrupts.
• Occurrence, either at the processor level or at the AIC level.
• The execution time of the instruction in progress when the interrupt occurs.
• The treatment of higher priority interrupts and the resynchronization of the hardware signals.
Interrupt Latencies
External Interrupt Edge Triggered Source
External Interrupt Level Sensitive Source
External Interrupt Edge Triggered Source
External Interrupt Level Sensitive Source
(Negative Edge)
(Positive Edge)
(High Level)
(Low Level)
IRQ or FIQ
IRQ or FIQ
IRQ or FIQ
IRQ or FIQ
nIRQ
MCK
nFIQ
nIRQ
MCK
nFIQ
Maximum IRQ Latency = 4 Cycles
Maximum FIQ Latency = 4 Cycles
Latency = 3 Cycles
Latency = 3 cycles
Maximum IRQ
Maximum FIQ
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
166

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