AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 385
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
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Quantity
Price
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Part Number:
AT91SAM7S256D-AU
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31.6.6
The USART features the RS485 mode to enable line driver control. While operating in RS485 mode, the USART
behaves as though in asynchronous or synchronous mode and configuration of all the parameters is possible. The
difference is that the RTS pin is driven high when the transmitter is operating. The behavior of the RTS pin is con-
trolled by the TXEMPTY bit. A typical connection of the USART to a RS485 bus is shown in
Figure 31-28. Typical Connection to a RS485 Bus
The USART is set in RS485 mode by programming the USART_MODE field in the Mode Register (US_MR) to the
value 0x1.
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high when a timeguard is
programmed so that the line can remain driven after the last character completion.
of the RTS waveform during a character transmission when the timeguard is enabled.
Figure 31-29. Example of RTS Drive with Timeguard
RS485 Mode
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
RTS
USART
Start
Bit
D0
RXD
TXD
RTS
D1
D2
D3
D4
D5
D6
D7
Parity
Bit
Stop
Bit
Differential
SAM7S Series [DATASHEET]
TG = 4
Bus
Figure 31-29
6175M–ATARM–26-Oct-12
Figure
gives an example
31-28.
385
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