AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 467
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S256D-AU
Manufacturer:
ATMEL
Quantity:
101
- Current page: 467 of 775
- Download datasheet (5Mb)
33.6.4
Register Name:
Access Type:
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0 = Counter is incremented on rising edge of the clock.
1 = Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• LDBSTOP: Counter Clock Stopped with RB Loading
0 = Counter clock is not stopped when RB loading occurs.
1 = Counter clock is stopped when RB loading occurs.
• LDBDIS: Counter Clock Disable with RB Loading
LDBDIS
WAVE
31
23
15
–
–
7
0
0
1
1
0
0
0
0
1
1
1
1
TC Channel Mode Register: Capture Mode
BURST
LDBSTOP
CPCTRG
30
22
14
TC_CMRx [x=0..2] (WAVE = 0)
Read-write
–
–
6
TCCLKS
0
1
0
1
0
0
1
1
0
0
1
1
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
29
21
13
–
–
–
5
BURST
0
1
0
1
0
1
0
1
28
20
12
–
–
–
4
Clock Selected
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
CLKI
27
19
11
–
3
–
LDRB
ABETRG
26
18
10
–
2
SAM7S Series [DATASHEET]
TCCLKS
6175M–ATARM–26-Oct-12
25
17
–
9
1
ETRGEDG
LDRA
24
16
–
8
0
467
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