AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 130

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

20.2.5
20.2.5.1
Several commands on the Flash memory are available. These commands are summarized in
126. Each command is driven by the programmer through the parallel interface running several read/write hand-
shaking sequences.
When a new command is executed, the previous one is automatically achieved. Thus, chaining a read command
after a write automatically flushes the load buffer in the Flash.
In the following tables, 21-6 through 21-18
This command is used to read the contents of the Flash memory. The read command can start at any valid
address in the memory plane and is optimized for consecutive reads. Read handshaking can be chained; an inter-
nal address buffer is automatically increased.
Table 20-6.
Table 20-7.
Step
1
2
3
4
5
...
n
n+1
n+2
n+3
...
Step
1
2
3
4
5
6
7
...
n
n+1
• DATA[15:0] pertains to SAM7S512/256/128/64/321/161
• DATA[7:0] pertains to SAM7S32/16
Device Operations
Flash Read Command
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Write handshaking
Write handshaking
Read Command
Read Command
MODE[3:0]
CMDE
ADDR0
ADDR1
DATA
DATA
...
ADDR0
ADDR1
DATA
DATA
...
MODE[3:0]
CMDE
ADDR0
ADDR1
ADDR2
ADDR3
DATA
DATA
...
ADDR0
ADDR1
DATA[15:0]
READ
Memory Address LSB
Memory Address
*Memory Address++
*Memory Address++
...
Memory Address LSB
Memory Address
*Memory Address++
*Memory Address++
...
READ
Memory Address LSB
Memory Address
Memory Address
Memory Address
*Memory Address++
*Memory Address++
...
Memory Address LSB
Memory Address
DATA[7:0]
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
Table 20-3 on page
130