XC5VLX50T-1FFG665C Xilinx Inc, XC5VLX50T-1FFG665C Datasheet - Page 238

• Manufacturer Part Number: XC5VLX50T-1FFG665C
• Description: FPGA, VIRTEX-5 LXT, 50K, 665FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665C

• No. Of Logic Blocks: 7200
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• Total Ram Bits: 2211840
• No. Of I/o's: 360
• Clock Management: DCM, PLL
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 550MHz
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 665-BBGA, FCBGA
• Core Supply Voltage Range: 1V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1565

Chapter 6: SelectIO Resources
238
Virtex-5 FPGA I/O Resource VHDL/Verilog Examples
The allowed values for the DIFF_TERM attribute are:
•
•
To specify the DIFF_TERM attribute, set the appropriate value in the generic map (VHDL)
or inline parameter (Verilog) of the instantiated IBUFDS or IBUGDS component. Please
refer to the ISE Language Templates or the Virtex-5 FPGA HDL Libraries Guide for the
proper syntax for instantiating this component and setting the DIFF_TERM attribute.
The VHDL and Verilog example syntaxes to declare a standard for Virtex-5 FPGA I/O
resources are found in the Virtex-5 FPGA Libraries Guide.
TRUE
FALSE (Default)
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Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010