XC5VLX50T-1FFG665C Xilinx Inc, XC5VLX50T-1FFG665C Datasheet - Page 283

• Manufacturer Part Number: XC5VLX50T-1FFG665C
• Description: FPGA, VIRTEX-5 LXT, 50K, 665FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665C

• No. Of Logic Blocks: 7200
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• Total Ram Bits: 2211840
• No. Of I/o's: 360
• Clock Management: DCM, PLL
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 550MHz
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 665-BBGA, FCBGA
• Core Supply Voltage Range: 1V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1565

X-Ref Target - Figure 6-75
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DCI
DIFF_SSTL2_II_DCI
DIFF_SSTL2_II_DCI
DIFF_SSTL2_II_DCI
R 0 = 25
R 0 = 25
Ω
Figure 6-75: Differential SSTL2 (2.5V) Class II with DCI Bidirectional Termination
Ω
+
–
2R
2R
2R
2R
Figure 6-75
differential SSTL2 Class II (2.5V) with bidirectional DCI termination.
Table 6-31
Table 6-31: Differential SSTL2 Class II DC Voltage Specifications
VRN
VRP
VRN
Notes:
1. V
2. V
3. V
4. V
VRP
V
Input Parameters
V
V
V
V
V
Output Parameters
V
CCO
TT
IN
ID
ID
IX
OX
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
IN
ID
IX
OX
(AC)
(DC)
(DC)
(AC)
(AC)
(AC) indicates the voltage where the differential input signals must cross.
(DC) specifies the allowable DC excursion of each differential input.
(DC) specifies the input differential voltage required for switching.
(AC) indicates the voltage where the differential output signals must cross.
(3)
(1)
(2)
V
(4)
lists the differential SSTL2 Class II DC voltage specifications.
V
CCO
shows a sample circuit illustrating a valid termination technique for
CCO
= 2.5V
= 2.5V
IOB
www.xilinx.com
Z 0
Z 0
Specific Guidelines for I/O Supported Standards
IOB
V
CCO
V
CCO
= 2.5V
2R
2R
2R
2R
= 2.5V
–0.30
Min
0.62
0.95
VRP
VRN
VRP
VRN
2.3
0.3
1.0
–
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
V
CCO
Typ
2.5
–
–
–
–
–
× 0.5
DIFF_SSTL2_II_DCI
DIFF_SSTL2_II_DCI
DIFF_SSTL2_II_DCI
ug190_6_71_041106
+
–
R 0 = 25
R 0 = 25
V
V
V
CCO
CCO
CCO
Ω
Ω
Max
1.55
2.7
1.5
–
+ 0.30
+ 0.60
+ 0.60
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