HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 104

• Manufacturer Part Number: HW-V5-PCIE2-UNI-G
• Description: KIT DEV PCIEXPRESS GTX VIRTEX5
• Manufacturer: Xilinx Inc
• Series: Virtex™ -5r
• Type: FPGAr

Specifications of HW-V5-PCIE2-UNI-G

• Contents: Board, CD
• For Use With/related Products: Virtex™-5 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 4: Configuration
104
Programming the PROM
9.
10. After a pause, PROM File Generation Succeeded is displayed.
A PROM image file is now created and is ready for programming into the ML555 board. A
fully populated PROM file (.mcs) with two design revisions must always be generated
even if all of the Configuration Addresses (0, 1, 2, or 3) in the Platform Flash are not
programmed. The unused revisions can be populated with dummy bitstreams.
PROMGEN generates four output files. The MCS and CFI files should always be in the
same directory when the XCF32P Platform Flash is programmed. The CFI file contains
configuration information used by iMPACT during programming operations, and the file
is unique for each MCS file created.
Connect the programming cable between the computer and the ML555 board. Apply
power to the ML555 board after the computer boots. To program the XCF32P PROM,
follow these steps:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. In the Revision Properties menu, shown in
Under Generate PROM File → Do you want to compress file?, click No.
Open iMPACT: Start → All Programs → Xilinx ISE → Accessories → iMPACT.
Double-click the Boundary Scan menu option.
Right-click on Right click to Add Device or Initialize JTAG chain.
Select Initialize Chain as shown in
chain is graphically displayed, as shown in
Boundary Scan… Summary indicates four devices are found. Under Assign New
Configuration File, click Cancel All.
Double-click the third (or fourth) device, xcf32p. The ML555 board contains two
Platform Flash devices.
Under Assign New Configuration File, browse to the directory where the MCS and
CFI file are stored on the computer. Click the MCS file to select it and then click Open.
Right-click the xcf32p icon and select Program.
Under the Programming Properties menu, shown in
Mode.
Under the Advanced PROM Programming Options menu, shown in
select PROM is Slave (clocked externally).
♦
♦
♦
In the Design Revision column, check the Rev boxes for the revisions to be
programmed. For this example, both Rev0 and Rev1 are selected. One XCF32P
device stores a maximum of two XC5VLX50T FPGA design images.
In the Erase column, check the Erase boxes for revisions that are going to be
programmed. In general, you should make sure that the device is erased before
programming. For this example, the previous Rev0 and Rev1 PROM design
images are to be erased before new design images are programmed.
Click OK to begin programming the selected Platform Flash and PROM file using
Boundary-Scan. After a pause, Program Succeeded is displayed. PROM
programming is complete.
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Figure
Figure
Figure
4-11. After a pause, the ML555 JTAG
Virtex-5 FPGA ML555 Development Kit
4-12.
4-15, select the following:
Figure
UG201 (v1.4) March 10, 2008
4-13, select Parallel
Figure
4-14,
R