HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 14

• Manufacturer Part Number: HW-V5-PCIE2-UNI-G
• Description: KIT DEV PCIEXPRESS GTX VIRTEX5
• Manufacturer: Xilinx Inc
• Series: Virtex™ -5r
• Type: FPGAr

Specifications of HW-V5-PCIE2-UNI-G

• Contents: Board, CD
• For Use With/related Products: Virtex™-5 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 1: Introduction
14
The ML555 board is supported by Xilinx LogiCORE IP versions 4 and 6, respectively. Each
core has a primary version number, shown in
number. More information about the current versions of these cores is available in the
LogiCORE data sheets for the PCI and PCI-X section of the PCI/PCI-X product lounge
(refer to http://www.xilinx.com/products/logicore/lounge/lounge.htm).
the Xilinx cores for PCI and PCI-X operation.
Table 1-1: Xilinx Cores Supporting PCI and PCI-X Operation
These Xilinx interface cores are pre-implemented and fully tested modules for Xilinx
FPGAs.
The v4 64-bit interface is compliant with the PCI Local Bus Specification, revision 3.0. The
v6 64-bit interface is compliant with the PCI Local Bus Specification, revision 3.0, and the
PCI-X Addendum, revision 2.0.
The pinout for each Virtex-5 device and the relative placement of the internal logic are
predefined. Critical paths are controlled by constraints to ensure predictable timing,
significantly reducing the engineering time required to implement the bus interface
portion of a user design. When targeting an XC5VLX50T-FFG1136 FPGA, the Xilinx CORE
Generator™ tool provides an example design and a constraints file utilizing the ML555
board pinout for PCI and PCI-X designs.
Resources can instead be focused on unique user application logic in the FPGA and on the
system-level design. As a result, the Xilinx interface products for PCI and PCI-X operation
minimize product development time.
The following links provide more information:
•
•
Included with the purchase of the ML555 development kit is a 90-day access to full system
hardware evaluation versions of the Virtex-5 FPGA LogiCORE products for PCI and PCI-X
designs. The following link provides additional information specific to the ML555 board
and LogiCORE products:
Xilinx LogiCORE products:
www.xilinx.com/products/design_resources/conn_central/index.htm
PCI and PCI-X specific applications:
www.xilinx.com/products/design_resources/conn_central/protocols/pci_pcix.htm
www.xilinx.com/ipcenter/ml555/ml555_eval_instr.htm
Version
v4
v4
v4
v6
v6
v6
v6
Mode
PCI-X
PCI-X
PCI-X
Bus
PCI
PCI
PCI
PCI
www.xilinx.com
Bus Width
32 bits
32 bits
64 bits
64 bits
64 bits
64 bits
64 bits
Table
Frequency
133 MHz
100 MHz
33 MHz
66 MHz
33 MHz
66 MHz
33 MHz
Clock
1-1, followed by a revision or build
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
(FPGA Pin #)
Clock Type
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Global (J14)
Table 1-1
lists
R