HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 40

• Manufacturer Part Number: HW-V5-PCIE2-UNI-G
• Description: KIT DEV PCIEXPRESS GTX VIRTEX5
• Manufacturer: Xilinx Inc
• Series: Virtex™ -5r
• Type: FPGAr

Specifications of HW-V5-PCIE2-UNI-G

• Contents: Board, CD
• For Use With/related Products: Virtex™-5 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 3: Hardware Description
Serial ATA Interface
40
The ML555 board provides a single Serial ATA (SATA) disk drive interface connector, J5,
for attachment to an external SATA disk drive. The board supports 1.5 Gbps and 3 Gbps
SATA baud rates. A second SATA interface can be supported using the SMA connectors on
the board and an external SMA to SATA interface board available from Xilinx with part
number HW-AFX-SMA-SATA. The SATA and SMA transceivers are connected to a
common GTP primitive block in the FPGA.
One of the two provided clock synthesizer modules must be used to generate a 150 MHz
reference clock for the SATA GTP transceiver.
The ML555 board does not provide DC power to the drive. An external DC power supply
must provide the drive power. The SATA signal interface cable is not supplied with the
development kit.
Xilinx Alliance Partners have IP cores that can be licensed for development and fielding a
SATA interface solution. The available Alliance Partners IP cores can be found at
www.xilinx.com/alliance/.
XAPP870
physical link initialization between the GTP transceiver in the Virtex-5 LXT FPGA and an
external SATA device.
Table 3-8
board does not provide DC power for the SATA drives.
Table 3-8: SATA Connector
Notes:
1. NC = no connect.
2. The Host side transceiver ports are AC coupled with a 0.01 μF capacitor. The SATA interface is
connected to GTP_DUAL tile X0Y5.
J5
1
2
3
4
5
6
7
lists the signal names and pin assignments for the SATA connector. The ML555
[Ref 11]
provides a reference design demonstrating how to complete the SATA
www.xilinx.com
SATA_RXN
SATA_TXN
SATA_TXP
SATA_RXP
Signal
GND
GND
GND
(2)
(2)
(2)
(2)
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
FPGA Pin
NC
NC
NC
A2
A3
B4
B3
(1)
R