HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 81

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HW-V5-PCIE2-UNI-G

Manufacturer Part Number
HW-V5-PCIE2-UNI-G
Description
KIT DEV PCIEXPRESS GTX VIRTEX5
Manufacturer
Xilinx Inc
Series
Virtex™ -5r
Type
FPGAr

Specifications of HW-V5-PCIE2-UNI-G

Contents
Board, CD
For Use With/related Products
Virtex™-5 FPGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
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Table 3-34: ML555 Onboard DC-to-DC Voltage Converters
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
Notes:
1. Refer to
2. For PCI and PCI-X design applications, position switch SW8
3. For PCI Express design applications, position switch SW8
4. These voltage regulator output ports are connected in series through a 10 mΩ Kelvin resistor to the load on the ML555 board. VR1
5. FPGA power supplies can be turned on in any sequence. The Virtex-5 FPGA data sheet provides a table for “Power-On Current for
ML555 Board
Designator
Reference
ML555 board schematics.
and FPGA V
ML555 board.
U14 output. GTP transceiver analog supplies are powered from the 3.3V input voltage of the PCI Express connector. Install two
shunts on connector P18 (P18-1 to P18-2 and P18-3 to P18-4) to connect VR1 5V output to power the onboard regulators.
has a 150 mΩ series Kelvin resistor. Refer to
Virtex-5 Devices” for a specified voltage power-on sequence (V
it need to have, voltage sequencing circuitry for the DC-to-DC voltage converters on the board.
VR4
VR5
VR6
VR7
VR1
VR2
VR3
U12
U13
U14
(4,5)
(4,5)
(4,5)
(4,5)
(5)
(5)
(5)
(4)
(5)
(5)
Figure 3-14, page 76
R
(1)
CCINT
PCI Connector 5V Input
PCI Connector 5V Input
PCI Connector 5V Input
PCI Connector 5V Input
PCI Connector 5V Input
PCI or PCI-X Mode
from the 3.3V input voltage of the PCI connector. Remove shunts on header P18 before applying power to the
PCI Connector 3.3V
PCI Connector 3.3V
PCI Connector 3.3V
PCI Connector 3.3V
Not Used
Input
Input
Input
Input
for a block diagram of the ML555 DC power system. Additional design information is available on the
Input Voltage Source
(2)
(2)
“Power Supply Monitoring,” page 82
U14 3.0V Output
VR1 5V Output
VR1 5V Output
VR1 5V Output
VR1 5V Output
VR1 5V Output
Connector 3.3V
Connector 3.3V
Connector 3.3V
Connector 12V
PCI Express
PCI Express
PCI Express
PCI Express
PCI Express
Mode
Input
Input
Input
Input
www.xilinx.com
(Figure 3-16, page
(3)
(Figure 3-16, page
CCINT
- V
AVTTTX and
1.0V AVCC
AVCCPLL
Nominal
CCAUX
Voltage
AVTRX
Output
1.0V
1.8V
0.9V
2.5V
2.5V
3.0V
1.2V
1.2V
5V
78) to power FPGA V
- V
78) to power the GTP transceiver analog supplies
for additional information.
CCO
). The ML555 board does not have, nor does
Maximum
Current
Output
6A
6A
6A
5A
5A
5A
6A
4A
4A
4A
CCINT
Provides 5V power to
onboard voltage
regulators in PCI
Express mode only
DDR2 memory, other
1.8V ML555 peripherals,
and FPGA 1.8V V
reference voltage
DDR2 memory interface
termination and FPGA
0.9V reference voltage
FPGA V
FPGA V
header and other ML555
2.5V peripherals
PCI FPGA 3.0V V
reference voltage
FPGA V
GTP 1.2V analog
voltage for transmitter
and receiver
termination voltages
GTP 1.2V analog
voltage for PLL circuitry
GTP 1.0V analog
voltage
from the 3.0V regulator
Voltage Regulators
DC Power Sink
CCAUX
CCO
CCINT
, XGI
voltage
supply
CCO
CCO
81

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