HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 47

• Manufacturer Part Number: HW-V5-PCIE2-UNI-G
• Description: KIT DEV PCIEXPRESS GTX VIRTEX5
• Manufacturer: Xilinx Inc
• Series: Virtex™ -5r
• Type: FPGAr

Specifications of HW-V5-PCIE2-UNI-G

• Contents: Board, CD
• For Use With/related Products: Virtex™-5 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
R
Table 3-12: SAMTEC Pin Connections (P32) (Continued)
Table 3-13: SAMTEC Pin Connections (P33)
Notes:
1. These signals are connected to FPGA banks 1 and 19. The FPGA reference voltage for these banks is
2. Bank 1 GPIO clock-capable I/O signals. All others are in FPGA Bank 19.
3. NC = no connect.
4. Bank 19 clock-capable I/O pins.
SAMTEC-QSE-
SAMTEC-QSE-
028-DP P32
028-DP P33
2.5V. See the ML555 board schematics on the CD-ROM for additional information.
Odd
Odd
73
75
77
79
11
13
15
17
19
21
23
25
27
29
31
33
35
37
1
3
5
7
9
GPIO1_I22_N
GP1O2_I23_N
GPIO1_I22_P
GP1O2_I23_P
GP1O2_I13_P
GP1O2_I21_N
GP1O2_I19_N
GP1O2_I17_N
GP1O2_I15_N
GP1O2_I21_P
GP1O2_I19_P
GP1O2_I17_P
GP1O2_I15_P
No connect
No Connect
No Connect
Signal
Signal
GND
GND
GND
GND
GND
GND
GND
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(1)
(1)
(2)
(2)
(2)
(4)
(2)
FPGA
N/A
N/A
FPGA
AG12
K12
K13
AF13
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Pin
AC4
AC5
AA5
AA6
AB5
Pin
W6
Y8
Y9
Y7
SAMTEC-QSE-
SAMTEC-QSE-
028-DP P32
028-DP P33
Even
Even
74
76
78
80
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
2
4
6
8
GPIO1_I23_N
GP1O2_I22_N
GP1O2_I22_P
GP1O2_I12_P
GPIO1_I23_P
GP1O2_I20_N
GP1O2_I18_N
GP1O2_I16_N
GP1O2_I14_N
GP1O2_I20_P
GP1O2_I18_P
GP1O2_I16_P
GP1O2_I14_P
No Connect
No Connect
No connect
Signal
Signal
GND
GND
GND
GND
GND
GND
GND
(1)
(1)
LVDS Interface
(2)
(2)
(2)
(4)
(2)
FPGA
FPGA
N/A
N/A
H12
AE13
AE12
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Pin
AC7
AD7
AD4
AD5
AD6
J12
AB6
AB7
AE6
AE7
Pin
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