EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 470

• Manufacturer Part Number: EP1S40B956C5
• Description: IC STRATIX FPGA 40K LE 956-BGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S40B956C5

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 683
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 956-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Conclusion
Conclusion
More
Information
References
4–42
Stratix Device Handbook, Volume 2
Stratix and Stratix GX devices provide the I/O capabilities to allow you
to work with current and emerging I/O standards and requirements.
Today’s complex designs demand increased flexibility to work with the
wide variety of available I/O standards and to simplify board design.
With Stratix and Stratix GX device features, such as hot socketing and
differential on-chip termination, you can reduce board design interface
costs and increase your development flexibility.
For more information, see the following sources:
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For more information, see the following references:
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The Stratix Device Family Data Sheet section in the Stratix Device
Handbook, Volume 1
The Stratix GX Device Family Data Sheet section of the Stratix GX
Device Handbook, Volume 1
The High-Speed Differential I/O Interfaces in Stratix Devices chapter
AN 224: High-Speed Board Layout Guidelines
Stub Series Terminated Logic for 2.5-V (SSTL-2), JESD8-9B,
Electronic Industries Association, December 2000.
High-Speed Transceiver Logic (HSTL) – A 1.5-V Output Buffer
Supply Voltage Based Interface Standard for Digital Integrated
Circuits, EIA/JESD8-6, Electronic Industries Association, August
1995.
1.5-V +/- 0.1 V (Normal Range) and 0.9 V – 1.6 V (Wide Range)
Power Supply Voltage and Interface Standard for Non-terminated
Digital Integrated Circuits, JESD8-11, Electronic Industries
Association, October 2000.
1.8-V +/- 0.15 V (Normal Range) and 1.2 V – 1.95 V (Wide Range)
Power Supply Voltage and Interface Standard for Non-terminated
Digital Integrated Circuits, JESD8-7, Electronic Industries
Association, February 1997.
Center-Tap-Terminated (CTT) Low-Level, High-Speed Interface
Standard for Digital Integrated Circuits, JESD8-9A, Electronic
Industries Association, November 1993.
2.5-V +/- 0.2V (Normal Range) and 1.8-V to 2.7V (Wide Range)
Power Supply Voltage and Interface Standard for Non-terminated
Digital Integrated Circuits, JESD8-5, Electronic Industries
Association, October 1995.
Interface Standard for Nominal 3V/ 3.3-V Supply Digital Integrated
Circuits, JESD8-B, Electronic Industries Association, September 1999.
Gunning Transceiver Logic (GTL) Low-Level, High-Speed Interface
Standard for Digital Integrated Circuits, JESD8-3, Electronic
Industries Association, November 1993.
Altera Corporation
June 2006