EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 564

• Manufacturer Part Number: EP1S40B956C5
• Description: IC STRATIX FPGA 40K LE 956-BGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S40B956C5

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 683
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 956-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Architecture
Figure 6–7. DSP Row Interface Block
6–14
Stratix Device Handbook, Volume 2
C4 and C8
Interconnects
LAB
DSP Block to
LAB Row Interface
Block Interconnect Region
DirectLink Interconnect
from Adjacent LAB
10
Control Signals in the Row Interface Block
The DSP block has a set of input registers, a pipeline register, and an
output register. Each register is grouped in banks that share the same
clock and clear resources:
■
■
■
1- to 9-bit banks for the input register
1- to 18-bit banks for the pipeline register
18 bits for the output register
Row Interface
3
18
Block
18 Inputs per Row
R4 and R8 Interconnects
10
9
Control
[17..0]
DSP Block
Row Structure
[17..0]
18 Outputs per Row
Nine DirectLink Outputs
to Adjacent LABs
18
18
9
Altera Corporation
DirectLink Interconnect
from Adjacent LAB
July 2005
LAB