UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 101

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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5.6 Changing Setting of System Clock and CPU Clock
5.6.1 Time required for switching between system clock and CPU clock
(CSS0) of the subclock control register (CSS).
is used for the duration of several instructions after that (see Table 5-2).
The CPU clock can be selected by using bit 1 (PCC1) of the processor clock control register (PCC) and bit 4
Actually, the specified clock is not selected immediately after the setting of PCC has been changed; the old clock
Remarks 1. Two clocks is the minimum instruction execution time of the CPU clock before switching.
Set Value Before Switching
CSS0
0
1
2. The parenthesized values apply to operation at f
3. x: Don’t care
PCC1
0
1
x
Table 5-2. Maximum Time Required for Switching CPU Clock
CSS0
0
2 clocks
2 clocks
CHAPTER 5 CLOCK GENERATOR
User’s Manual U13952EJ3V1UD
PCC1
0
Set Value After Switching
CSS0
0
X
= 5.0 MHz or f
4 clocks
2 clocks
PCC1
1
XT
= 32.768 kHz.
CSS0
1
2f
f
(306 clocks)
X
(76 clocks)
/2f
X
/f
XT
XT
clocks
clocks
PCC1
x
99

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