UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 74

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.2 Configuration of Ports
4.2.1 Port 0
mode register 0 (PM0). When the P00 to P03 pins are used as input port pins, on-chip pull-up resistors can be
connected in 4-bit units by setting pull-up resistor option register 0 (PU0).
72
Control registers
Ports
Pull-up resistors
The ports consist of the following hardware.
This is a 4-bit I/O port with an output latch. Port 0 can be specified as input or output in 1-bit units by using port
Port 0 is set to input mode when the RESET signal is input.
Figure 4-2 shows a block diagram of port 0.
PU0: Pull-up resistor option register 0
PM:
RD:
WR:
Item
WR
WR
Port mode register
Port 0 read signal
Port 0 write signal
WR
RD
PORT
PU0
PM
PM00 to PM03
(P00 to P03)
Output latch
Port mode registers (PMm: m = 0, 2, 4, 5, 8, 9)
Pull-up resistor option registers (PUm: m = 0 to 2)
Total: 43 (input: 7, I/O: 36)
PU00
Figure 4-2. Block Diagram of P00 to P03
Mask ROM version
Total: 36 (software control: 32, mask option control: 4)
Flash memory version
Total: 32 (software control only)
Table 4-2. Configuration of Port
CHAPTER 4 PORT FUNCTIONS
User’s Manual U13952EJ3V1UD
Configuration
V
DD0
P-ch
P00 to P03