UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 250

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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248
Maskable interrupt request
Non-maskable interrupt request
RESET input
Remarks 1. f
x: Don’t care
Releasing Source
(c)
Releasing by RESET input
When the HALT mode is released by the RESET signal, execution branches to the reset vector address
in the same manner as the ordinary reset operation, and program execution is started.
2. The parenthesized values apply to operation at f
RESET
signal
Clock
X
: Main system clock oscillation frequency
Operation
mode
instruction
Figure 16-3. Releasing HALT Mode by RESET Input
Table 16-2. Operation After Release of HALT Mode
HALT
MKxx
- -
0
0
1
CHAPTER 16 STANDBY FUNCTION
HALT mode
Oscillation
User’s Manual U13952EJ3V1UD
IE
0
1
x
x
Oscillation
period
Reset
stops
X
= 5.0 MHz.
Executes next address instruction
Executes interrupt servicing
Retains HALT mode
Executes interrupt servicing
Reset processing
(2
15
stabilization
wait status
Oscillation
Oscillation
/f
X
Wait
: 6.55 ms)
Operation
Operation
mode

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