UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 80

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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4.2.3 Port 4
mode register 4 (PM4). When using the P40 to P47 pins as input port pins, on-chip pull-up resistors can be connected
in 8-bit units by setting pull-up resistor option register 0 (PU0).
78
This is an 8-bit I/O port with an output latch. Port 4 can be specified as input or output in 1-bit units by using port
Port 4 is also used as a key return input.
Port 4 is set to input mode when the RESET signal is input.
Figures 4-8 and 4-9 show block diagrams of port 4.
Caution When using the pins of port 4 as the key return, the key return mode register must be set
KRM00:
PU0:
PM:
RD:
WR:
WR
WR
WR
WR
RD
PORT
according to the function to be used. For how to set the registers, see 15.3 (6) Key return mode
register 00 (KRM00).
KRM
PU0
PM
Key return mode register 00
Pull-up resistor option register 0
Port mode register
Port 4 read signal
Port 4 write signal
PM40 to PM45
(P40 to P45)
Output latch
KRM000 to
Alternate
function
KRM005
PU04
Figure 4-8. Block Diagram of P40 to P45
CHAPTER 4 PORT FUNCTIONS
User’s Manual U13952EJ3V1UD
V
DD0
P-ch
P40/KR0 to
P45/KR5

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