UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 167

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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(10) Interrupt request flag (ADIF0)
Remarks 1. n = 0, 1, ..., 6
(11) AV
A/D conversion
Changing the contents of A/D converter mode register 0 (ADM0) does not clear the interrupt request flag
(ADIF0).
If the voltage at the analog input pins is changed during A/D conversion, therefore, the A/D conversion result
and the conversion end interrupt request flag may reflect the previous analog input just before writing to
ADM0. In this case, the ADIF0 may appear to be set if it is read-accessed just after ADM0 is write-accessed,
even when A/D conversion has not been completed for the new analog input.
In addition, ADIF0 must be cleared before A/D conversion is restarted.
The AV
ANI6 input circuit.
If your application is designed to be changed to backup power, the AV
voltage level as for the V
INTAD0
ADCR0
DD
2. m = 0, 1, ..., 6
pin
DD
Rewriting to ADM0
(to begin conversion
for ANIn)
pin is used to supply power to the analog circuit. It is also used to supply power to the ANI0 to
Figure 11-11. A/D Conversion End Interrupt Request Generation Timing
CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES)
ANIn
Main power
source
DD0
pin, as shown in Figure 11-12.
Figure 11-12. AV
User’s Manual U13952EJ3V1UD
ANIn
ANIn
Rewriting to ADM0
(to begin conversion
for ANIm)
DD
Backup
capacitor
Pin Processing
ANIn
ANIm
ADIF0 has been set, but conversion
for ANIm has not been completed.
V
AV
V
AV
DD0
SS0
DD
SS
DD
pin must be supplied with the same
ANIm
ANIm
ANIm
165

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