UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 239

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

P40/KR0
P41/KR1
P42/KR2
P43/KR3
P44/KR4
P45/KR5
KRM00
Symbol
(6)
Cautions 1. Bits 1 to 3, 6, and 7 must be fixed to 0.
Remark
Note Selector that selects the pin used for falling edge input
Key return mode register 00 (KRM00)
This register sets the pin that detects a key return signal (falling edge of port 4).
KRM00 is set using a 1-bit or 8-bit memory manipulation instruction.
Bit 0 (KRM000) is set in 4-bit units for KR0/P40 to KR3/P43 pins. Bits 4 and 5 (KRM004 and KRM005) are
set in 1-bit units for KR4/P44 and KR5/P45 pins, respectively.
RESET input sets KRM00 to 00H.
Figures 15-7 and 15-8 show the format of key return mode register 00 and the block diagram of the falling
edge detector, respectively.
KRM00n
7
0
2. When the KRM00 register is set to 1, a pull-up resistor is connected automatically. However,
3. Before setting KRM00, always set bit 5 of MK1 (KRMK00 = 1) to disable interrupts in advance.
4. The key return signal cannot be detected while even one of the pins that specify detection of
n = 0, 4, 5
0
1
the pull-up resistor is cut if the pin is in output mode.
After setting KRM00, clear bit 5 of MK1 (KRMK00 = 0) after clearing bit 5 of IF1 (KRIF00 = 0) to
enable interrupts.
the key return signal is low, even if a falling edge is generated at other key return pins.
6
0
No detection
Detection (detecting falling edge of port 4)
KRM005 KRM004
5
Note
Figure 15-7. Format of Key Return Mode Register 00
Figure 15-8. Block Diagram of Falling Edge Detector
4
Key return mode register 00 (KRM00)
CHAPTER 15 INTERRUPT FUNCTIONS
3
0
User’s Manual U13952EJ3V1UD
2
0
1
0
Key return signal detection selection
KRM000
Falling edge detector
0
KRMK
Address
FFF5H
After reset
00H
R/W
R/W
KRIF00 set signal
Standby release
signal
237