UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 143

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

ANI0/P60
ANI1/P61
ANI2/P62
ANI3/P63
ANI4/P64
ANI5/P65
ANI6/P66
(1)
(2)
(3)
(4)
Successive approximation register (SAR)
The SAR receives the result of comparing an analog input voltage and a voltage at a voltage tap (comparison
voltage), received from the series resistor string, starting from the most significant bit (MSB).
Upon receiving all the bits, down to the least significant bit (LSB), that is, upon the completion of A/D
conversion, the SAR sends its contents to A/D conversion result register 0 (ADCR0).
A/D conversion result register 0 (ADCR0)
ADCR0 holds the result of A/D conversion. Each time A/D conversion ends, the conversion result received
from the successive approximation register is loaded into ADCR0, which is an 8-bit register that holds the
result of A/D conversion.
ADCR0 is read using an 8-bit memory manipulation instruction.
RESET input makes ADCR0 undefined.
Sample & hold circuit
The sample & hold circuit samples consecutive analog inputs from the input circuit, one by one, and sends
them to the voltage comparator. The sampled analog input voltage is held during A/D conversion.
Voltage comparator
The voltage comparator compares an analog input with the voltage output by the series resistor string.
ADS02 ADS01 ADS00
3
A/D input selection
register 0 (ADS0)
CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES)
Figure 10-1. Block Diagram of 8-Bit A/D Converter
ADCS0 FR02 FR01 FR00
Sample & hold circuit
Internal bus
User’s Manual U13952EJ3V1UD
A/D converter mode
register 0 (ADM0)
AV
SS
Controller
Successive
approximation
register (SAR)
A/D conversion result
register 0 (ADCR0)
Voltage comparator
Series resistor string
P-ch
AV
AV
AV
INTAD0
DD
REF
SS
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