UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 177

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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Transmit shift register 00 (TXS00)
This register is used to specify data to be transmitted. Data written to TXS00 is transmitted as serial data.
If the data length is specified as 7 bits, bits 0 to 6 of the data written to TXS00 are transferred as the transmit
data. The transmit operation is started by writing data to TXS00.
TXS00 is written to using an 8-bit memory manipulation instruction. It cannot be read.
RESET input sets TXS00 to FFH.
Caution Do not write to TXS00 during a transmit operation.
Receive shift register 00 (RXS00)
This register is used to convert serial data input to the RxD pin into parallel data. Each time one byte of data
is received, it is transferred to receive buffer register 00 (RXB00).
RXS00 cannot be manipulated directly by program.
Receive buffer register 00 (RXB00)
This register is used to hold received data. Each time one byte of data is received, a new byte of data is
transferred from receive shift register 00 (RXS00).
If the data length is specified as 7 bits, receive data is transferred to bits 0 to 6 of RXB00, and the MSB of
RXB00 always becomes 0.
RXB00 can be read using an 8-bit memory manipulation instruction. It cannot be written to.
RESET input makes RXB00 undefined.
Caution RXB00 and transmit shift register 00 (TXS00) are allocated to the same address, and when
Transmit controller
This circuit controls transmit operations by adding a start bit, parity bit, and stop bit to data written to transmit
shift register 00 (TXS00), according to the data set to asynchronous serial interface mode register 00
(ASIM00).
Receive controller
This circuit controls receive operations according to the data set to asynchronous serial interface mode
register 00 (ASIM00). It also performs a parity error check, etc., during receive operations, and when an error
is detected, it sets a value to asynchronous serial interface status register 00 (ASIS00) in accordance with
the nature of the error.
TXS00 and receive buffer register 00 (RXB00) are allocated to the same address, and when
reading is performed, RXB00 values are read.
writing is performed, the values are written to TXS00.
CHAPTER 13 SERIAL INTERFACE 00
User’s Manual U13952EJ3V1UD
175

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