UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 265

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

<RESET pin>
signal generator on the board, a signal conflict occurs. To prevent this signal conflict, isolate the connection with
the reset signal generator.
operation will not be performed. Do not input signals other than reset signals from the dedicated flash programmer
during this period.
<Port pins>
programming communication to the status immediately after reset.
status, connect the external device to V
<Oscillation pins>
operation mode.
oscillator disconnected, and leave the X2 pin open. For the subclock, connection conforms to that in the normal
operation mode.
<Power supply>
programmer, and the V
because the voltage is monitored by the flash programmer, therefore, VDD of the flash programmer must be
connected.
mode.
<Other pins>
operation mode.
When the reset signal of the dedicated flash programmer is connected to the RESET pin connected to the reset
If a reset signal is input from the user system in the flash memory programming mode, a normal programming
Shifting to the flash memory programming mode sets all the pins except those used for flash memory
Therefore, if the external device does not acknowledge an initial status such as the output high impedance
When using an on-board clock, connection of X1, X2, XT1, and XT2 must conform to the methods in the normal
When using the clock output of the flash programmer, directly connect it to the X1 pin with the on-board main
To use the power output of the flash programmer, connect the V
To use the on-board power supply, connection must conform to that in the normal operation mode. However,
For the other power supply pins (AV
Handle the other pins (S0 to S15, COM0 to COM3, V
PD78F9418A
SS0
RESET
and V
SS1
Figure 18-7. Signal Conflict (RESET Pin)
In the flash memory programming mode, the signal output
by the reset signal generator and the signal output by the
dedicated flash programmer conflict, therefore, isolate the
signal on the reset signal generator side.
pins to GND of the flash programmer.
DD
DD0
, AV
CHAPTER 18
, V
User’s Manual U13952EJ3V1UD
Signal conflict
DD1
REF
, V
, AV
SS0
SS
, or V
), supply the same power supply as in the normal operation
PD78F9418A
SS1
Reset signal generator
LC0
Connection pin of dedicated
flash programmer
via a resistor.
to V
Output pin
LC2
, BIAS) in the same way as in the normal
DD0
and V
DD1
pins to VDD of the flash
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