UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 272

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

20.2 Operation List
270
MOV
XCH
Mnemonic
Notes 1. Except r = A.
Remark
2. Except r = A, X.
One instruction clock cycle is one CPU clock cycle (f
register (PCC).
r, #byte
saddr, #byte
sfr, #byte
A, r
r, A
A, saddr
saddr, A
A, sfr
sfr, A
A, !addr16
!addr16, A
PSW, #byte
A, PSW
PSW, A
A, [DE]
[DE], A
A, [HL]
[HL], A
A, [HL+byte]
[HL+byte], A
A, X
A, r
A, saddr
A, sfr
A, [DE]
A, [HL]
A, [HL+byte]
Note 1
Note 1
Note 2
Operands
CHAPTER 20 INSTRUCTION SET
Bytes
User’s Manual U13952EJ3V1UD
3
3
3
2
2
2
2
2
2
3
3
3
2
2
1
1
1
1
2
2
1
2
2
2
1
1
2
Clocks
6
6
6
4
4
4
4
4
4
8
8
6
4
4
6
6
6
6
6
6
4
6
6
6
8
8
8
r
(saddr)
sfr
A
r
A
(saddr)
A
sfr
A
(addr16)
PSW
A
PSW
A
(DE)
A
(HL)
A
(HL + byte)
A
A
A
A
A
A
A
byte
A
r
(saddr)
sfr
(addr16)
PSW
(DE)
(HL)
(HL + byte)
X
r
(saddr)
sfr
(HL + byte)
(DE)
(HL)
byte
A
A
A
byte
A
CPU
byte
A
A
) selected by the processor clock control
A
Operation
Z AC CY
x
x
Flag
x
x
x
x