UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 242

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

15.4.2 Maskable interrupt acknowledgment operation
interrupt mask flag is cleared to 0. A vectored interrupt is acknowledged in the interrupt enabled status (when the IE
flag is set to 1).
follows:
from the one assigned the highest priority by the priority specification flag.
flag is reset to 0, and the data in the vector table determined for each interrupt request is loaded to the PC, and
execution branches.
240
A maskable interrupt can be acknowledged when the interrupt request flag is set to 1 and the corresponding
The time required to start the interrupt servicing after a maskable interrupt request has been generated is as
When two or more maskable interrupt requests are generated at the same time, they are acknowledged starting
An interrupt held pending is acknowledged when the status in which it can be acknowledged is set.
Figure 15-12 shows the algorithm of acknowledging interrupts.
When a maskable interrupt request is acknowledged, the PSW and PC are saved to the stack in that order, the IE
To restore from interrupt servicing, use the RETI instruction.
Table 15-3. Time from Generation of Maskable Interrupt Request to Servicing
Note The wait time is maximum when an interrupt request is generated immediately before
Remark
9 clocks
Figure 15-12. Interrupt Acknowledgment Program Algorithm
the BT or BF instruction.
No
1 clock:
Minimum Time
CHAPTER 15 INTERRUPT FUNCTIONS
Vectored interrupt
xxMK = 0 ?
f
xxIF = 1 ?
CPU
servicing
1
IE = 1 ?
Start
User’s Manual U13952EJ3V1UD
(f
CPU
Yes (interrupt request generated)
Yes
Yes
: CPU clock)
19 clocks
No
No
Interrupt request pending
Interrupt request pending
Maximum Time
Note