UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 199

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

Lead Free Status / Rohs Status
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(3)
Cautions on UART mode
(a)
(b)
When RXE00 is set to 0 at the timing indicated by <1>, RXB00 holds the previous data and does not
generate INTSR00.
When RXE00 is set to 0 at the timing indicated by <2>, RXB00 renews the data and does not generate
INTSR00.
When RXE00 is set to 0 at the timing indicated by <3>, RXB00 renews the data and generates INTSR00.
When bit 7 (TXE00) of asynchronous serial interface mode register 00 (ASIM00) is cleared during
transmission, be sure to set transmit shift register 00 (TXS00) to FFH, then set the TXE00 bit to 1
before executing the next transmission.
When bit 6 (RXE00) of asynchronous serial interface mode register 00 (ASIM00) is cleared during
reception, receive buffer register 00 (RXB00) and the reception completion interrupt (INTSR00) are as
follows.
INTSR00
RxD pin
RXB00
CHAPTER 13 SERIAL INTERFACE 00
User’s Manual U13952EJ3V1UD
Parity
<1>
<3>
<2>
197

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