UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 109

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

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6.4 Operation of 16-Bit Timer 50
6.4.1 Operation as timer interrupt
50 (CR50) in advance at the interval set in TCL501 and TCL500.
continues and an interrupt request signal (INTTM50) is generated.
Other than above
In the timer interrupt function, interrupts are repeatedly generated at the count value set to 16-bit compare register
To operate the 16-bit timer as a timer interrupt, the following settings are required.
Caution If both the CPT501 flag and CPT500 flag are set to 0, the capture edge becomes operation
When the count value of 16-bit timer counter 50 (TM50) matches the value set to CR50, counting of TM50
Table 6-2 shows the interval time, and Figure 6-5 shows the timing of the timer interrupt operation.
Caution Be sure to process as follows when rewriting CR50 during a count operation.
Remarks 1. f
Set the count value to CR50
Set 16-bit timer mode control register 50 (TMC50) as shown in Figure 6-4.
TCL501
Figure 6-4. Settings of 16-Bit Timer Mode Control Register 50 for Timer Interrupt Operation
TMC50
0
0
prohibited.
<1> Set interrupts to disabled (TMMK50 (bit 4 of interrupt mask flag register 1 (MK1)) = 1)
<2> Set the inversion control of timer output data to disabled (TOC50 = 0)
2. The parenthesized values apply to operation at f
If CR50 is rewritten while interrupts are enabled, an interrupt request may be generated at the
time of rewrite.
X
TOD50 TOF50 CPT501 CPT500 TOC50 TCL501 TCL500 TOE50
: Main system clock oscillation frequency
0/1
0/1
TCL500
Table 6-2. Interval Time of 16-Bit Timer 50
0
1
0/1
CHAPTER 6 16-BIT TIMER 50
User’s Manual U13952EJ3V1UD
0/1
1/f
2
Setting prohibited
5
/f
0
X
X
(0.2 s)
(6.4 s)
0/1
Count Clock
0/1
X
= 5.0 MHz.
Setting of count clock (see Table 6-2)
2
2
16
21
/f
/f
X
X
(13.1 ms)
(419.4 ms)
Interval Time
107

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