UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 65

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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3.3.3 Table indirect addressing
3.3.4 Register addressing
[Function]
[Illustration]
[Function]
[Illustration]
The table contents (branch destination address) of the particular location to be addressed by the lower 5-bit
immediate data of an instruction code from bit 1 to bit 5 are transferred to the program counter (PC) and
branched.
This function is carried out when the CALLT [addr5] instruction is executed. The instruction enables a branch
to any location in the memory space by referring to the addresses stored in the memory table at 40H to 7FH.
The register pair (AX) contents to be specified with an instruction word are transferred to the program counter
(PC) and branched.
This function is carried out when the BR AX instruction is executed.
Effective address + 1
Effective address
Instruction code
rp
PC
7
15
PC
CHAPTER 3 CPU ARCHITECTURE
15
15
7
7
0
0
User’s Manual U13952EJ3V1UD
1
0
6
A
Memory (table)
5
0
High addr.
Low addr.
0
ta
0
4–0
0
0
8
0
7
7
1
0
8
0
8
0
0
0
7
7
6
1
X
5
0
0
1
0
0
0
63

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