UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 156

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

154
ANI0/P60
ANI1/P61
ANI2/P62
ANI3/P63
ANI4/P64
ANI5/P65
ANI6/P66
ADCR0
Symbol
(1)
(2)
Successive approximation register (SAR)
The SAR receives the result of comparing an analog input voltage and a voltage at a voltage tap (comparison
voltage), received from the series resistor string, starting from the most significant bit (MSB).
Upon receiving all the bits, down to the least significant bit (LSB), that is, upon the completion of A/D
conversion, the SAR sends its contents to A/D conversion result register 0 (ADCR0).
A/D conversion result register 0 (ADCR0)
ADCR0 is a 16-bit register that holds the result of A/D conversion. Lower 6 bits are fixed to 0. Each time A/D
conversion ends, the conversion result in the successive approximation register is loaded into ADCR0. The
conversion results are stored in ADCR0 starting from the most significant bit (MSB). The higher 8 bits of the
conversion results are stored in FF15H and the lower 2 bits of the conversion results are stored in FF14H.
ADCR0 is read using a 16-bit memory manipulation instruction.
RESET input makes ADCR0 undefined.
Caution When the PD78F9418A is used as the flash memory version of the PD789405A, 789406A,
ADS02 ADS01 ADS00
and 789407A, 8-bit access is possible, providing an object file has been assembled in the
3
PD789405A, 789406A, and 789407A.
A/D input selection
register 0 (ADS0)
CHAPTER 11 10-BIT A/D CONVERTER ( PD789417A SUBSERIES)
FF15H
Figure 11-1. Block Diagram of 10-Bit A/D Converter
ADCS0 FR02 FR01 FR00
Sample & hold circuit
Internal bus
User’s Manual U13952EJ3V1UD
A/D converter mode
register 0 (ADM0)
AV
SS
0
0
Controller
FF14H
Successive
approximation
register (SAR)
A/D conversion result
register 0 (ADCR0)
0
Voltage comparator
0
0
0
Series resistor string
Address After reset
FF14H,
FF15H
Undefined
P-ch
AV
AV
AV
INTAD0
DD
REF
SS
R/W
R