UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 63

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3.3 Instruction Address Addressing
(+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each time another
instruction is executed. When a branch instruction is executed, the branch destination information is set to the PC and
branched by the following addressing (for details of each instruction, refer to the 78K/0S Series Instructions User’s
Manual (U11047E)).
3.3.1 Relative addressing
An instruction address is determined by program counter (PC) contents. PC contents are normally incremented
[Function]
[Illustration]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the
start address of the following instruction is transferred to the program counter (PC) and branched. The
displacement value is treated as signed two’s complement data ( 128 to +127) and bit 7 becomes a sign bit.
This means that information is relatively branched to a location between 128 and +127, from the start address
of the next instruction when relative addressing is used.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
PC
15
15
15
When S = 0,
When S = 1,
indicates all bits 0.
indicates all bits 1.
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U13952EJ3V1UD
8
PC
+
S
7
6
jdisp8
0
0
0
... PC is the start address of
the next instruction of
a BR instruction.
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