UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 57

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(a)
(b)
(c)
(d)
Interrupt enable flag (IE)
This flag controls the interrupt request acknowledgment operations of the CPU.
When 0, IE is set to the interrupt disable status (DI), and all interrupt requests other than non-maskable
interrupts are disabled.
When 1, IE is set to the interrupt enable status (EI). At this time, interrupt request acknowledgment is
controlled by an interrupt mask flag corresponding to the interrupt source.
IE is reset (0) upon DI instruction execution or interrupt acknowledgment and is set (1) upon EI
instruction execution.
Zero flag (Z)
When the operation result is zero, this flag is set (1). It is reset (0) in all other cases.
Auxiliary carry flag (AC)
If the operation result has a carry from bit 3 or a borrow at bit 3, this flag is set (1). It is reset (0) in all
other cases.
Carry flag (CY)
This flag stores an overflow or underflow upon add/subtract instruction execution. It stores the shift-out
value upon rotate instruction execution and functions as a bit accumulator during bit manipulation
instruction execution.
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U13952EJ3V1UD
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