UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 105

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

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16-bit compare register 50 (CR50)
This register compares the value set to CR50 with the count value of 16-bit timer counter 50 (TM50), and
when they match, generates an interrupt request (INTTM50).
CR50 is set using a 16-bit memory manipulation instruction. Values from 0000H to FFFFH can be set.
RESET input sets CR50 to FFFFH.
Cautions 1. Although this register is manipulated by a 16-bit memory manipulation instruction, an 8-
16-bit timer counter 50 (TM50)
This is a 16-bit register that counts count pulses.
TM50 is read using a 16-bit memory manipulation instruction.
TM50 is in free-running mode during count clock input.
RESET input sets TM50 to 0000H, after which it enters free-running mode again.
Cautions 1. The count value after releasing stop becomes undefined because the count operation is
16-bit capture register 50 (TCP50)
This is a 16-bit register that captures the contents of 16-bit timer counter 50 (TM50).
TCP50 is set using a 16-bit memory manipulation instruction.
RESET input makes TCP50 undefined.
Caution Although this register is manipulated by a 16-bit memory manipulation instruction, an 8-bit
16-bit counter read buffer
This buffer latches the counter value of 16-bit timer counter 50 (TM50) and retains the count value.
2. When rewriting CR50 during a count operation, preset CR50 to interrupt disabled using
2. Although this register is manipulated by a 16-bit memory manipulation instruction, an 8-
3. When manipulated by an 8-bit memory manipulation instruction, readout should be
memory manipulation instruction can also be used. When manipulated by an 8-bit memory
manipulation instruction, the accessing method should be direct addressing.
bit memory manipulation instruction can also be used. When manipulated by an 8-bit
memory manipulation instruction, the accessing method should be direct addressing.
interrupt mask flag register 1 (MK1).
disabled using 16-bit timer mode control register 50 (TMC50).
If CR50 is rewritten while interrupts are enabled, an interrupt request may be generated
at the time of the rewrite.
executed during the oscillation stabilization time.
bit memory manipulation instruction can also be used. When manipulated by an 8-bit
memory manipulation instruction, the accessing method should be direct addressing.
performed in order from lower byte to higher byte and must be in pairs.
CHAPTER 6 16-BIT TIMER 50
User’s Manual U13952EJ3V1UD
Also, set the timer output data to inversion
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