UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 151

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

10.5 Cautions on Using 8-Bit A/D Converter
(1)
(2)
(3)
(4)
(5)
<1> Conflict between writing to A/D conversion result register 0 (ADCR0) at the end of conversion and reading
<2> Conflict between writing to the ADCR0 bit at the end of conversion and writing to A/D converter mode
Current consumption in the standby mode
When the A/D converter enters the standby mode, it stops operating. Stopping conversion (bit 7 (ADCS0) of
A/D converter mode register 0 (ADM0) = 0) can reduce the current consumption.
Figure 10-7 shows how to reduce the current consumption in the standby mode.
Input range for the ANI0 to ANI6 pins
Be sure to keep the input voltage at ANI0 to ANI6 within the rated range. If a voltage greater than AV
less than AV
output of the channel becomes undefined, and the conversion output of the other channels may also be
affected.
Conflict
Conversion results immediately following start of A/D conversion
The first A/D conversion value immediately following the start of A/D conversion may be undefined. Be sure
to poll the A/D conversion end interrupt request (INTAD0) and perform processing such as discarding the first
conversion result.
Timing that makes the A/D conversion result undefined
If the timing of the end of A/D conversion and the timing of the stop of operation of the A/D converter conflict,
the A/D conversion value may be undefined. Because of this, be sure to read out the A/D conversion result
while the A/D converter is in operation. Furthermore, when reading out an A/D conversion result after A/D
conversion has stopped, be sure to have done so by the time the next conversion result is complete.
The conversion result readout timing is shown in Figures 10-8 and 10-9.
from the ADCR0 bit
Reading from the ADCR0 bit takes precedence. After reading, the new conversion result is written to the
ADCR0 bit.
register 0 (ADM0) or A/D input selection register 0 (ADS0)
Writing to ADM0 or ADS0 takes precedence. A request to write to the ADCR0 bit is ignored. No A/D
conversion end interrupt request signal (INTAD0) is generated.
SS
Figure 10-7. How to Reduce Current Consumption in Standby Mode
(even within the absolute maximum rating) is input to a conversion channel, the conversion
CHAPTER 10 8-BIT A/D CONVERTER ( PD789407A SUBSERIES)
AV
AV
REF
SS
User’s Manual U13952EJ3V1UD
P-ch
Series resistor string
ADCS0
REF
149
or