UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 191

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

The baud rate transmit/receive clock to be generated is either a signal divided from the main system
clock, or a signal divided from the clock input from the ASCK pin.
(i)
Table 13-5. Example of Relationship Between Main System Clock and Baud Rate
1200
2400
4800
9600
19200
38400
76800
Generation of baud rate transmit/receive clock from main system clock
The transmit/receive clock is generated by dividing the main system clock. The baud rate
generated from the main system clock is estimated by using the following expression.
Baud Rate
(bps)
f
n: Value in the above table that is determined in the settings of TPS000 to TPS003 (2
X
: Main system clock oscillation frequency
[Baud rate] =
8)
BRGC00 Set Value
CHAPTER 13 SERIAL INTERFACE 00
2
n + 1
User’s Manual U13952EJ3V1UD
f
70H
60H
50H
40H
30H
20H
10H
X
8
[Hz]
f
X
= 5.0 MHz
1.73
Error (%)
f
X
= 4.9152 MHz
0
189
n