UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 193

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(2)
Communication operation
(a)
Data format
The transmit/receive data format is as shown in Figure 13-7. One data frame consists of a start bit,
character bits, parity bit and stop bit(s).
The specification of character bit length, parity selection, and specification of stop bit length for each
data frame is carried out using asynchronous serial interface mode register 00 (ASIM00).
When 7 bits are selected as the number of character bits, only the lower 7 bits (bits 0 to 6) are valid; the
most significant bit (bit 7) is ignored in transmission, and the most significant bit (bit 7) is always 0 in
reception.
The serial transfer rate is selected using ASIM00 and baud rate generator control register 00
(BRGC00).
If a serial data receive error occurs, the receive error contents can be determined by reading the status
of asynchronous serial interface status register 00 (ASIS00).
Start bit ......................
Character bits.............
Parity bits ...................
Stop bit(s)...................
Figure 13-7. Format of Asynchronous Serial Interface Transmit/Receive Data
Start
bit
D0
D1
CHAPTER 13 SERIAL INTERFACE 00
1 bit
7 bits/8 bits
Even parity/odd parity/0 parity/no parity
1 bit/2 bits
D2
User’s Manual U13952EJ3V1UD
D3
One data frame
D4
D5
D6
D7
Parity
bit
Stop bit
191