UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 196

• Manufacturer Part Number: UPD78F9418AGK-9EU
• Manufacturer: Renesas Electronics America

Specifications of UPD78F9418AGK-9EU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

194
(d)
RxD (Input)
INTSR00
Reception
When bit 6 (RXE00) of asynchronous serial interface mode register 00 (ASIM00) is set (1), a receive
operation is enabled and sampling of the RxD pin input is performed.
RxD pin input sampling is performed using the serial clock specified by ASIM00.
When the RxD pin input becomes low, the 3-bit counter starts counting, and when half the time
determined by the specified baud rate has passed, the data sampling start timing signal is output. If the
RxD pin input sampled again as a result of this start timing signal is low, it is identified as a start bit, the
3-bit counter is initialized and starts counting, and data sampling is performed. When character data, a
parity bit and one stop bit are detected after the start bit, reception of one frame of data ends.
When one frame of data has been received, the receive data in the shift register is transferred to receive
buffer register 00 (RXB00), and a reception completion interrupt (INTSR00) is generated.
If an error occurs, the receive data in which the error occurred is still transferred to RXB00, and
INTSR00 is generated.
If the RXE00 bit is reset (0) during the receive operation, the receive operation is stopped immediately.
In this case, the contents of RXB00 and asynchronous serial interface status register 00 (ASIS00) are
not changed, and INTSR00 is not generated.
Caution Be sure to read receive buffer register 00 (RXB00) even if a receive error occurs. If
Figure 13-9. Asynchronous Serial Interface Reception Completion Interrupt Timing
RXB00 is not read, an overrun error will occur when the next data is received, and the
receive error state will continue indefinitely.
Start
CHAPTER 13 SERIAL INTERFACE 00
D0
User’s Manual U13952EJ3V1UD
D1
D2
D6
D7
Parity
Stop