UPD78F9418AGK-9EU Renesas Electronics America, UPD78F9418AGK-9EU Datasheet - Page 75

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UPD78F9418AGK-9EU

Manufacturer Part Number
UPD78F9418AGK-9EU
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F9418AGK-9EU

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4.2.2 Port 2
mode register 2 (PM2). When using the P20 to P27 pins as input port pins, on-chip pull-up resistors can be connected
in 1-bit units by setting pull-up resistor option register 1 (PU1).
Caution When using the pins of port 2 for the serial interface, the I/O or output latch must be set
This is an 8-bit I/O port with an output latch. Port 2 can be specified as input or output in 1-bit units by using port
Port 2 is also used as a data I/O and clock I/O to and from the serial interface, timer I/O, and external interrupt.
Port 2 is set to input mode when the RESET signal is input.
Figures 4-3 through 4-7 show block diagrams of port 2.
PU1: Pull-up resistor option register 1
PM:
RD:
WR:
WR
WR
WR
RD
according to the function to be used. For how to set the latches, see Table 13-2 Operation Mode
Settings of Serial Interface 00.
PORT
PU1
PM
Port mode register
Port 2 read signal
Port 2 write signal
Output latch
Alternate
Alternate
function
function
PU120
PM20
(P20)
Figure 4-3. Block Diagram of P20
CHAPTER 4 PORT FUNCTIONS
User’s Manual U13952EJ3V1UD
V
DD0
P-ch
P20/ASCK/
SCK
73

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