LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 109

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
8.5.3 Pin Function Select register 2 (PINSEL2 - 0x4002 C008)
8.5.4 Pin Function Select Register 3 (PINSEL3 - 0x4002 C00C)
Table 80.
[1]
[2]
The PINSEL2 register controls the functions of the lower half of Port 1, which contains the
Ethernet related pins. The direction control bit in the FIO1DIR register is effective only
when the GPIO function is selected for a pin. For other functions, the direction is
controlled automatically.
Table 81.
The PINSEL3 register controls the functions of the upper half of Port 1. The direction
control bit in the FIO1DIR register is effective only when the GPIO function is selected for
a pin. For other functions, direction is controlled automatically.
Table 82.
PINSEL1 Pin name Function when
27:26
29:28
31:30
PINSEL2 Pin
1:0
3:2
7:4
9:8
15:10
17:16
19:18
21:20
27:22
29:28
31:30
PINSEL3 Pin
1:0
3:2
5:4
7:6
9:8
11:10
13:12
Not available on 80-pin package.
Pins P027] and P0[28] are open-drain for I
P0.29
P0.30
-
name
P1.0
P1.1
-
P1.4
-
P1.8
P1.9
P1.10
-
P1.14
P1.15
name
P1.16
P1.17
P1.18
P1.19
P1.20
P1.21
P1.22
Pin function select register 1 (PINSEL1 - address 0x4002 C004) bit description
Pin function select register 2 (PINSEL2 - address 0x4002 C008) bit description
Pin function select register 3 (PINSEL3 - address 0x4002 C00C) bit description
All information provided in this document is subject to legal disclaimers.
[1]
[1]
[1]
Function when
00
GPIO Port 1.16 ENET_MDC
GPIO Port 1.17 ENET_MDIO
GPIO Port 1.18 USB_UP_LED
GPIO Port 1.19 MCOA0
GPIO Port 1.20 MCI0
GPIO Port 1.21 MCABORT
GPIO Port 1.22 MCOB0
Reserved
Reserved
Function when
00
GPIO Port 1.0
GPIO Port 1.1
Reserved
GPIO Port 1.4
GPIO Port 1.8
GPIO Port 1.9
GPIO Port 1.10 ENET_RXD1
GPIO Port 1.14 ENET_RX_ER
GPIO Port 1.15 ENET_REF_CLK Reserved
00
GPIO Port 0.29 USB_D +
GPIO Port 0.30 USB_D −
Reserved
Rev. 2 — 19 August 2010
Function when
01
Function when
01
ENET_TXD0
ENET_TXD1
Reserved
ENET_TX_EN
Reserved
ENET_CRS
Reserved
ENET_RXD0
Function
when 01
Reserved
2
C-bus compliance.
Chapter 8: LPC17xx Pin connect block
Function
when 10
Reserved
Reserved
Reserved
Function
when 10
Reserved
Reserved
PWM1.1
USB_PPWR
PWM1.2
PWM1.3
USB_PWRD
Function
when 10
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Function
when 11
Reserved
Reserved
Function
when 11
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Function
when 11
Reserved
Reserved
CAP1.0
CAP1.1
SCK0
SSEL0
MAT1.0
Reserved
Reserved
Reserved
UM10360
© NXP B.V. 2010. All rights reserved.
Reset
value
00
00
00
109 of 840
00
00
00
00
Reset
value
00
00
0
00
0
00
00
00
0
00
00
Reset
value
00
00
00