LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 365

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 325. CAN Receive Frame Status register (CAN1RFS - address 0x4004 4020, CAN2RFS - address 0x4004 8020)
UM10360
User manual
Bit
9:0
10
15:11 -
19:16 DLC
29:20 -
30
31
Symbol
ID Index
BP
RTR
FF
bit description
16.7.9.1 ID index field
16.7.10 CAN Receive Identifier register (CAN1RID - 0x4004 4024, CAN2RID -
16.7.9 CAN Receive Frame Status register (CAN1RFS - 0x4004 4020,
Function
If the BP bit (below) is 0, this value is the zero-based number of the Lookup Table RAM entry
at which the Acceptance Filter matched the received Identifier. Disabled entries in the
Standard tables are included in this numbering, but will not be matched. See
“Examples of acceptance filter tables and ID index values” on page 393
Index values.
If this bit is 1, the current message was received in AF Bypass mode, and the ID Index field
(above) is meaningless.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
The field contains the Data Length Code (DLC) field of the current received message. When
RTR = 0, this is related to the number of data bytes available in the CANRDA and CANRDB
registers as follows:
0000-0111 = 0 to 7 bytes1000-1111 = 8 bytes
With RTR = 1, this value indicates the number of data bytes requested to be sent back, with
the same encoding.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
This bit contains the Remote Transmission Request bit of the current received message. 0
indicates a Data Frame, in which (if DLC is non-zero) data can be read from the CANRDA
and possibly the CANRDB registers. 1 indicates a Remote frame, in which case the DLC
value identifies the number of data bytes requested to be sent using the same Identifier.
A 0 in this bit indicates that the current received message included an 11-bit Identifier, while
a 1 indicates a 29-bit Identifier. This affects the contents of the CANid register described
below.
CAN2RFS - 0x4004 8020)
This register defines the characteristics of the current received message. It is read-only in
normal operation but can be written for testing purposes if the RM bit in CANxMOD is 1.
The ID Index is a 10-bit field in the Info Register that contains the table position of the ID
Look-up Table if the currently received message was accepted. The software can use this
index to simplify message transfers from the Receive Buffer into the Shared Message
Memory. Whenever bit 10 (BP) of the ID Index in the CANRFS register is 1, the current
CAN message was received in acceptance filter bypass mode.
0x4004 8024)
This register contains the Identifier field of the current received message. It is read-only in
normal operation but can be written for testing purposes if the RM bit in CANmod is 1. It
has two different formats depending on the FF bit in CANRFS. See
on specific CAN channel register address.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 16: LPC17xx CAN1/2
for examples of ID
Section 16.17
Table 313
UM10360
© NXP B.V. 2010. All rights reserved.
for details
Reset
Value
0
0
NA
0
NA
0
0
365 of 840
RM
Set
X
X
X
X
X